Senior Design Verification Engineer

Microsoft is a highly innovative company that collaborates across disciplines to produce cutting edge technology that changes our world.

The Silicon Architecture and Verification team is seeking a Senior Design Verification Engineer who can work with cross-discipline teams (systems, firmware, architecture, design, validation, product engineering, ...) to develop environment and test cases to verify hardware security designs. The candidate is also passionate in developing systematic and efficient methods to detecting hardware/software vulnerabilities. Our team is involved in numerous projects within Microsoft developing custom silicon for a diverse set of systems ranging from innovative high-performance consumer products to Azure and Sphere IoT.

Microsoft's mission is to empower every person and every organization on the planet to achieve more. As employees we come together with a growth mindset, innovate to empower others, and collaborate to realize our shared goals. Each day we build on our values of respect, integrity, and accountability to create a culture of inclusion where everyone can thrive at work and beyond.

In alignment with our Microsoft values, we are committed to cultivating an inclusive work environment for all employees to positively impact our culture every day.

Responsibilities

The Microsoft Artificial Intelligence Silicon Engineering(AISiE) team is seeking a Senior Design Verification Engineer to deliver premium-quality designs once considered impossible. We are responsible for delivering cutting-edge, custom Intellectual Property(IP) and System on Chip(SoC) designs that can perform complex and high-performance functions in an extremely efficient manner.

• Plan the verification of complex design Intellectual Property(IP)/ system on Chip(SoC) interacting with the architecture and design engineers to identify verification test scenarios.

• Create and enhance constrained-random verification environments using SystemVerilog and Universal Verification Methodology(UVM), or formally verify designs with SystemVerilog Assertions(SVA) and industry leading formal tools.

• Develop tests using UVM or C/C++.

• Analyse and debug test failures with designers to deliver functionally correct design.

• Identify and write functional coverage for stimulus and corner cases.

• Close coverage to plug verification holes and meet tape out requirements.

• Other

• Embody our Culture (~~~) and Values (~~~)  

Qualifications

Required Qualifications:

• 7+ years of related technical engineering experience

• OR Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 4+ years technical engineering experience or internship experience

• OR Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 3+ years technical engineering experience or internship experience

• OR Doctorate degree in Electrical Engineering, Computer Engineering, Computer Science, or related field.

• 6+ years of experience in design verification with full verification cycle on complex SoC IPs and/or systems.

• Knowledge of verification principles, testbenches, stimulus generation, Verilog verification and background in creating simulation environments, developing tests, and debugging designs.

• Good understanding of chip and/or computer architecture and experience writing tests in UVM, C and C++.

Other Requirements:

• Ability to meet Microsoft, customer and/or government security screening requirements are required for this role. These requirements include, but are not limited to the following specialized security screenings: Microsoft Cloud Background Check: This position will be required to pass the Microsoft Cloud Background Check upon hire/transfer and every two years thereafter.

• This role will require access to information that is controlled for export under export control regulations, potentially under the U.S. International Traffic in Arms Regulations or Export Administration Regulations, the EU Dual Use Regulation, and/or other export control regulations. As a condition of employment, the successful candidate will be required to provide proof of citizenship, U.S. permanent residency, or other protected status (e.g., under 8 U.S.C. § 1324b(a)(3)) for assessment of eligibility to access the export-controlled information. To meet this legal requirement, and as a condition of employment, the successful candidate's citizenship will be verified with a valid passport. Lawful permanent residents, refugees, and asylees may verify status using other documents, where applicable.

Preferred qualifications:

Prior experience in two of more of the following would also be valuable

• Hardware security IP and SOC level verification.

• Experience with secure hardware design for embedded systems.

• Firmware development experience, with secure and non-secure boot flow.

• Experience with hardware emulation or Field Progammable Gate Array(FPGAs).

• Experience in Register Transfer Level(RTL) design for FPGA or emulation.

• Experience in Assembly, start up code and linker scripts.

• Experience in developing makefiles for software development.

• Scripting language such as Python, Ruby, or Perl.

Silicon Engineering IC4 - The typical base pay range for this role across the U.S. is USD $117,200 - $229,200 per year. There is a different range applicable to specific work locations, within the San Francisco Bay area and New York City metropolitan area, and the base pay range for this role in those locations is USD $153,600 - $250,200 per year.

Certain roles may be eligible for benefits and other compensation. Find additional benefits and pay information here: ~~~

Microsoft will accept applications for the role until October 11, 2024.

Microsoft is an equal opportunity employer. Consistent with applicable law, all qualified applicants will receive consideration for employment without regard to age, ancestry, citizenship, color, family or medical care leave, gender identity or expression, genetic information, immigration status, marital status, medical condition, national origin, physical or mental disability, political affiliation, protected veteran or military status, race, ethnicity, religion, sex (including pregnancy), sexual orientation, or any other characteristic protected by applicable local laws, regulations and ordinances. If you need assistance and/or a reasonable accommodation due to a disability during the application process, read more about requesting accommodations (~~~) .